Resistive memories are non-volatile random access memories (NVRAMs) in which data is stored by resistive storage elements. A resistive memory element can be put in two states (e.g., high and low resistance) to store a bit data. One type of resistive memory cell is a 1T1R (1 transistor, 1 resistor) memory cell. The 1T1R memory cell is composed of a resistive memory element that is connected in series with an access transistor, and the memory cell provides three terminals: Wordline (WL), Bitline (BL) and Sourceline (SL). The 1T1R memory cells are then stacked in columns, each column sharing the BL and SL terminals. The 1T1R memory cell is accessed during read/write operations by asserting the WL that turns on the access transistor. Reading from the memory cell is accomplished by sensing the resistance of the resistive memory element that is positioned between the BL and SL nodes.
In the most common read technique, a fixed voltage is applied between the BL and SL nodes, and the current passing through the resistive memory element is measured by a sense amplifier. However, the leakage current through the unselected memory cells that are located in the same column with the selected memory cell overlap with the data signal, degrading the sense margin. The problem associated with the degraded sense margin is further exacerbated by a higher access transistor leakage in deeply-scaled technologies.
One potential method to reduce sub-threshold leakage is to under-drive the WLs to negative voltage levels. Such a method is typically used in Dynamic Random Access Memories (DRAMs). The negative voltage level for the WLs can be generated using an on-chip charge pump. However, the leakage on the negative supply rail through the WL drivers requires the charge pump to be active even when there is no memory access. This in turn can prohibitively increase the DC (Direct Current) power, particularly for low-power applications. Moreover, the negative supply rail increases the design complexity due to high-voltage induced reliability issues.